/*
 * Copyright (c) 2021 Futurewei Technologies, Inc.
 *
 * clang2mpl is licensed under Mulan PSL v2.
 * You can use this software according to the terms and conditions of the Mulan
 * PSL v2. You may obtain a copy of Mulan PSL v2 at:
 *
 *     http://license.coscl.org.cn/MulanPSL2
 *
 * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY
 * KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO
 * NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. See the
 * Mulan PSL v2 for more details.
 */
// RUN: %clang2mpl --ascii --verify %s -- -Wno-unused-value --target=aarch64-linux-elf
// RUN: cat %m | %FileCheck %s

// CHECK: [[# FILENUM:]] "{{.*}}/test/convert.c"

void test() {
  char v0;
  signed char v1;
  unsigned char v2;
  short v3;
  unsigned short v4;
  int v5;
  unsigned int v6;
  long v7;
  unsigned long v8;
  long long v9;
  unsigned long long v10;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u32 %v0)
  (char)v0;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 8 (dread u32 %v0))
  (signed char)v0;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread u32 %v0))
  (unsigned char)v0;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 16 (dread u32 %v0))
  (short)v0;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 16 (dread u32 %v0))
  (unsigned short)v0;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i32 u32 (dread u32 %v0))
  (int)v0;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u32 %v0)
  (unsigned int)v0;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u32 (dread u32 %v0))
  (long)v0;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v0)
  (unsigned long)v0;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u32 (dread u32 %v0))
  (long long)v0;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v0)
  (unsigned long long)v0;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread i32 %v1))
  (char)v1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i32 %v1)
  (signed char)v1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread i32 %v1))
  (unsigned char)v1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 16 (dread i32 %v1))
  (short)v1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 16 (dread i32 %v1))
  (unsigned short)v1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i32 %v1)
  (int)v1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u32 i32 (dread i32 %v1))
  (unsigned int)v1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i64 %v1)
  (long)v1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u64 i32 (dread i32 %v1))
  (unsigned long)v1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i64 %v1)
  (long long)v1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u64 i32 (dread i32 %v1))
  (unsigned long long)v1;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread u32 %v2))
  (char)v2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 8 (dread u32 %v2))
  (signed char)v2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u32 %v2)
  (unsigned char)v2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 16 (dread u32 %v2))
  (short)v2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 16 (dread u32 %v2))
  (unsigned short)v2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i32 u32 (dread u32 %v2))
  (int)v2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u32 %v2)
  (unsigned int)v2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u32 (dread u32 %v2))
  (long)v2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v2)
  (unsigned long)v2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u32 (dread u32 %v2))
  (long long)v2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v2)
  (unsigned long long)v2;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread i32 %v3))
  (char)v3;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 8 (dread i32 %v3))
  (signed char)v3;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread i32 %v3))
  (unsigned char)v3;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i32 %v3)
  (short)v3;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 16 (dread i32 %v3))
  (unsigned short)v3;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i32 %v3)
  (int)v3;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u32 i32 (dread i32 %v3))
  (unsigned int)v3;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i64 %v3)
  (long)v3;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u64 i32 (dread i32 %v3))
  (unsigned long)v3;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i64 %v3)
  (long long)v3;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u64 i32 (dread i32 %v3))
  (unsigned long long)v3;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread u32 %v4))
  (char)v4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 8 (dread u32 %v4))
  (signed char)v4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread u32 %v4))
  (unsigned char)v4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 16 (dread u32 %v4))
  (short)v4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u32 %v4)
  (unsigned short)v4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i32 u32 (dread u32 %v4))
  (int)v4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u32 %v4)
  (unsigned int)v4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u32 (dread u32 %v4))
  (long)v4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v4)
  (unsigned long)v4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u32 (dread u32 %v4))
  (long long)v4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v4)
  (unsigned long long)v4;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread i32 %v5))
  (char)v5;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 8 (dread i32 %v5))
  (signed char)v5;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread i32 %v5))
  (unsigned char)v5;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 16 (dread i32 %v5))
  (short)v5;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 16 (dread i32 %v5))
  (unsigned short)v5;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i32 %v5)
  (int)v5;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u32 i32 (dread i32 %v5))
  (unsigned int)v5;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i64 %v5)
  (long)v5;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u64 i32 (dread i32 %v5))
  (unsigned long)v5;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i64 %v5)
  (long long)v5;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u64 i32 (dread i32 %v5))
  (unsigned long long)v5;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread u32 %v6))
  (char)v6;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 8 (dread u32 %v6))
  (signed char)v6;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 8 (dread u32 %v6))
  (unsigned char)v6;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i32 16 (dread u32 %v6))
  (short)v6;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u32 16 (dread u32 %v6))
  (unsigned short)v6;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i32 u32 (dread u32 %v6))
  (int)v6;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u32 %v6)
  (unsigned int)v6;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u32 (dread u32 %v6))
  (long)v6;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v6)
  (unsigned long)v6;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u32 (dread u32 %v6))
  (long long)v6;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v6)
  (unsigned long long)v6;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 8 (dread i64 %v7))
  (char)v7;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i64 8 (dread i64 %v7))
  (signed char)v7;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 8 (dread i64 %v7))
  (unsigned char)v7;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i64 16 (dread i64 %v7))
  (short)v7;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 16 (dread i64 %v7))
  (unsigned short)v7;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i32 i64 (dread i64 %v7))
  (int)v7;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u32 i64 (dread i64 %v7))
  (unsigned int)v7;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i64 %v7)
  (long)v7;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u64 i64 (dread i64 %v7))
  (unsigned long)v7;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i64 %v7)
  (long long)v7;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u64 i64 (dread i64 %v7))
  (unsigned long long)v7;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 8 (dread u64 %v8))
  (char)v8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i64 8 (dread u64 %v8))
  (signed char)v8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 8 (dread u64 %v8))
  (unsigned char)v8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i64 16 (dread u64 %v8))
  (short)v8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 16 (dread u64 %v8))
  (unsigned short)v8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i32 u64 (dread u64 %v8))
  (int)v8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u32 u64 (dread u64 %v8))
  (unsigned int)v8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u64 (dread u64 %v8))
  (long)v8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v8)
  (unsigned long)v8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u64 (dread u64 %v8))
  (long long)v8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v8)
  (unsigned long long)v8;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 8 (dread i64 %v9))
  (char)v9;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i64 8 (dread i64 %v9))
  (signed char)v9;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 8 (dread i64 %v9))
  (unsigned char)v9;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i64 16 (dread i64 %v9))
  (short)v9;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 16 (dread i64 %v9))
  (unsigned short)v9;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i32 i64 (dread i64 %v9))
  (int)v9;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u32 i64 (dread i64 %v9))
  (unsigned int)v9;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i64 %v9)
  (long)v9;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u64 i64 (dread i64 %v9))
  (unsigned long)v9;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread i64 %v9)
  (long long)v9;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u64 i64 (dread i64 %v9))
  (unsigned long long)v9;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 8 (dread u64 %v10))
  (char)v10;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i64 8 (dread u64 %v10))
  (signed char)v10;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 8 (dread u64 %v10))
  (unsigned char)v10;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (sext i64 16 (dread u64 %v10))
  (short)v10;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (zext u64 16 (dread u64 %v10))
  (unsigned short)v10;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i32 u64 (dread u64 %v10))
  (int)v10;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt u32 u64 (dread u64 %v10))
  (unsigned int)v10;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u64 (dread u64 %v10))
  (long)v10;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v10)
  (unsigned long)v10;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (cvt i64 u64 (dread u64 %v10))
  (long long)v10;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: eval (dread u64 %v10)
  (unsigned long long)v10;
}
